RTC Magazine

USB has become the interface of choice for many PC and consumer products, having reached an installed base of more than six billion units and counting. It is the ubiquitous connectivity interface, a status achieved through performance, reliability, ease of use (plug-and-play) and wide device support. Now, these same factors are driving adoption by embedded and industrial designers.

USB started out in 1995 as the replacement connection for the mouse and keyboard. USB 1.0/1.1 provided 1.2/12 Mbit/s performance options and of course plug-and-play, but it was with version 2.0 that USB’s true potential was realized. At 480 Mbits/s, it could deal with multimedia and storage applications, enabling a raft of new products from camcorders and digital still cameras to external hard disk and flash drives.

Yet, with more recent devices such as MP3 players reaching tens of gigabytes, and high-definition camcorders and hard disk drives (HDDs) now at hundreds of gigabytes, even USB 2.0 is becoming slow. Now, the next generation—USB 3.0, or “SuperSpeed USB”—is on the horizon, promising performance of 5 Gbits/s and aiming to substantially reduce transfer times.

The much anticipated Revision 1.0 of the USB 3.0 specification was finally released in November 2008, followed by technology demonstrations in January 2009. A number of semiconductor and IP companies will introduce products in 2009 that should enable end products such as HDDs and camcorders to make their way into the market by 2010. However, it’s likely to take some time before USB 3.0 becomes as widespread as its predecessors. In the meantime, however, two factors are expected to drive its adoption. First is that there is an ongoing march toward more speed in the above-referenced applications; and secondly, embedded designs are now taking a serious look at USB.

Clearly some embedded designs will be affected immediately, while others will take some time, if at all. USB 3.0’s backward compatibility and the physical-layer (PHY) similarities it has with PCI Express (PCIe)—itself the dominant high-speed interconnect in embedded designs—bodes well for its successful integration into industrial applications. Furthermore, USB’s legacy of simplicity and compatibility should ease its adoption of “SuperSpeed” USB, saving embedded systems developers significant design resources.

USB 3.0 Architectural Overview

A USB 3.0 host or device port is actually two interfaces in one; USB 2.0 operates in parallel with USB 3.0. USB 3.0 shares core architectural elements and a tiered star topology with USB 2.0, but at the semiconductor, connector and cable level, the interfaces and connections are completely separate (Figure 1).

Equally important is that USB 3.0 is a dual-simplex system, as opposed to half-duplex in USB 2.0, which means data flows from the host can be in both directions simultaneously. A USB 3.0 cable then has to accommodate the standard connections for USB 2.0 (D+, D- and VBUS) plus the high-speed differential connections for USB 3.0. As a consequence, the cables and connectors for SuperSpeed operation are specific to USB 3.0 (Figure 2).

The USB 3.0 controller, however, is completely separate from USB 2.0, which means if a USB 2.0 device is plugged into a USB 3.0 host receptacle, it only communicates with the USB 2.0 controller, functioning completely as USB 2.0 and unaware of the host’s USB 3.0 capability. USB 3.0 hosts and devices are, therefore, completely backward compatible with USB 2.0, an invaluable feature of the interface cables and connectors.

The USB 3.0 connector has the same form factor as USB 2.0 but houses five additional pins (Figure 3). The USB 3.0 pins are arranged such that they only mate with a USB 3.0 cable; if a USB 2.0 cable is used only the USB 2.0 pins will mate. It’s worth noting that the USB 3.0 cable will also mate with the USB 2.0 pins, enabling the host to use both USB 3.0 and 2.0 in parallel. The valid combinations of plugs and receptacles are shown in Table 1, and it’s clear from this that there is no need to switch to USB 3.0 for compatibility reasons.