USB in Embedded

USB 3.0 Boosts Speed 10x, Broadens Embedded-Systems Applicability

USB 3.0 represents a quantum leap in speed while maintaining backward compatibility with USB 2.0. Other features such as bidirectional data flows and improved power characteristics make it a tempting choice for embedded designs.


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USB has become the interface of choice for many PC and consumer products, having reached an installed base of more than six billion units and counting. It is the ubiquitous connectivity interface, a status achieved through performance, reliability, ease of use (plug-and-play) and wide device support. Now, these same factors are driving adoption by embedded and industrial designers.

USB started out in 1995 as the replacement connection for the mouse and keyboard. USB 1.0/1.1 provided 1.2/12 Mbit/s performance options and of course plug-and-play, but it was with version 2.0 that USB’s true potential was realized. At 480 Mbits/s, it could deal with multimedia and storage applications, enabling a raft of new products from camcorders and digital still cameras to external hard disk and flash drives.

Yet, with more recent devices such as MP3 players reaching tens of gigabytes, and high-definition camcorders and hard disk drives (HDDs) now at hundreds of gigabytes, even USB 2.0 is becoming slow. Now, the next generation—USB 3.0, or “SuperSpeed USB”—is on the horizon, promising performance of 5 Gbits/s and aiming to substantially reduce transfer times.

The much anticipated Revision 1.0 of the USB 3.0 specification was finally released in November 2008, followed by technology demonstrations in January 2009. A number of semiconductor and IP companies will introduce products in 2009 that should enable end products such as HDDs and camcorders to make their way into the market by 2010. However, it’s likely to take some time before USB 3.0 becomes as widespread as its predecessors. In the meantime, however, two factors are expected to drive its adoption. First is that there is an ongoing march toward more speed in the above-referenced applications; and secondly, embedded designs are now taking a serious look at USB.

Clearly some embedded designs will be affected immediately, while others will take some time, if at all. USB 3.0’s backward compatibility and the physical-layer (PHY) similarities it has with PCI Express (PCIe)—itself the dominant high-speed interconnect in embedded designs—bodes well for its successful integration into industrial applications. Furthermore, USB’s legacy of simplicity and compatibility should ease its adoption of “SuperSpeed” USB, saving embedded systems developers significant design resources.

USB 3.0 Architectural Overview

A USB 3.0 host or device port is actually two interfaces in one; USB 2.0 operates in parallel with USB 3.0. USB 3.0 shares core architectural elements and a tiered star topology with USB 2.0, but at the semiconductor, connector and cable level, the interfaces and connections are completely separate (Figure 1).

Equally important is that USB 3.0 is a dual-simplex system, as opposed to half-duplex in USB 2.0, which means data flows from the host can be in both directions simultaneously. A USB 3.0 cable then has to accommodate the standard connections for USB 2.0 (D+, D- and VBUS) plus the high-speed differential connections for USB 3.0. As a consequence, the cables and connectors for SuperSpeed operation are specific to USB 3.0 (Figure 2).

The USB 3.0 controller, however, is completely separate from USB 2.0, which means if a USB 2.0 device is plugged into a USB 3.0 host receptacle, it only communicates with the USB 2.0 controller, functioning completely as USB 2.0 and unaware of the host’s USB 3.0 capability. USB 3.0 hosts and devices are, therefore, completely backward compatible with USB 2.0, an invaluable feature of the interface cables and connectors.

The USB 3.0 connector has the same form factor as USB 2.0 but houses five additional pins (Figure 3). The USB 3.0 pins are arranged such that they only mate with a USB 3.0 cable; if a USB 2.0 cable is used only the USB 2.0 pins will mate. It’s worth noting that the USB 3.0 cable will also mate with the USB 2.0 pins, enabling the host to use both USB 3.0 and 2.0 in parallel. The valid combinations of plugs and receptacles are shown in Table 1, and it’s clear from this that there is no need to switch to USB 3.0 for compatibility reasons.

The USB 3.0 feature most talked about is, of course, the 5 Gbit/s transfer speed, but there are other features that will become useful in embedded designs. The main features of USB 3.0 are:

• 5 Gbit/s peak data transfer rate

• Dual-simplex differential signaling, enabling simultaneous bidirectional host data flows

• Multi-level link power management down to the function level

• Increased bus power capability (now 900 mA)

• Packet traffic explicitly routed

• 100 percent backward compatibility with USB 2.0, 1.1 and 1.0

• Operation over 10-foot cables

With power management being a primary objective of the USB 3.0 specification, many of the idiosyncrasies in USB 2.0 that inhibited effective power management, such as continuous device polling and broadcast transmission through hubs, have been removed. The introduction of multi-level power management provides a greater flexibility of link power state and the capability to power down different portions of circuitry, dependent on power state.

From the software perspective, the main feature in the USB stack is the eXtensible host controller driver, or xHCD (Figure 4). The HCD is hardware-specific and provides the software layer between the host controller hardware and the USB driver (USBD) layer. As with the hardware, the xHCD has been designed to sit alongside the USB 2.0 HCDs, allowing for backward compatibility. The USBD is a system software bus driver that abstracts the details of the HCD to the USB driver interface (USBDI), which is the standard USB system interface. The USBD is similar to that used for USB 2.0 but has extensions to allow for USB 3.0-specific features.

USB 2.0 class drivers for device classes, such as mass storage, audio and human interface, can be used directly for USB 3.0. Modification is only necessary if the USB 3.0 extensions of the USBD are required. An example of this is the mass storage class, where the USBD has extensions intended solely for use by this class. Table 2 shows the essential differences between USB 3.0 and USB 2.0

Empowering the Embedded Designer

Embedded designers need to consider which of their products actually need the features of USB 3.0. For example, if exceptionally large data files or power management are key considerations, embedding USB 3.0 would be advantageous. Effective use of USB 3.0 power management coupled with the higher transfer rate could result in substantially lower overall power than USB 2.0. Other factors that enter into the decision are increased bus power and interrupt-driven operation, providing better response times in embedded designs.

Paramount in any embedded design, of course, is the consideration of cost. The SuperSpeed interface is effectively on top of standard USB 2.0, and thus is inherently more expensive to implement in silicon, and the increased complexity in the cables and connectors will increase their cost as well.

Then there’s the design itself and sorting through the options available to design USB 3.0 into a system. Typically USB 2.0 is added as either a local bus controller sitting on the processor’s memory bus or as a PCI peripheral. First-generation USB 3.0 controllers are being designed for PCIe 2.0, or Gen 2, because of the 5 Gbit/s performance requirement; PCIe Gen 1, in contrast, would require multi-lane support. It is feasible to use the Gen 2 bridge on a Gen 1 lane (2.5 Gbit/s) which, while not achieving the maximum throughput, does provide more bandwidth than USB 2.0. Local bus support may not be practical for USB 3.0 because of the transfer rates involved, so PCIe will probably represent the best stand-alone solution in the short term. Beyond that, USB 3.0 is expected to be integrated into SoCs and processors, which will further simplify the embedded system process.

From a software perspective, USB 2.0 is widely supported in both commercially available operating systems and RTOSs, but it’s likely that the same support for USB 3.0 will take some time, so designers will need to write their own xHCD in the meantime.

USB 3.0 is expected to become more commonly used in embedded systems than were earlier versions of the interface, though less-demanding designs could get by with USB 2.0. While local bus and PCIe-based USB 2.0 host controllers from companies such as PLX Technology can give designs ample data transfers, USB 3.0’s speed, power management, software support and PHY similar to PCIe should lead embedded-systems designers to take a good, long look at this quantum leap in USB technology.

PLX Technology
Sunnyvale, CA.
(408) 774-9060.