Hybrid Signal Processing 3U VPX Board Teams DSPs with FPGAs

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A new signal processing board features a mix of FPGAs and DSPs in the form of a large Altera Stratix II GX FPGA and one cluster of four ADSP-TS201S TigerSHARC processors from Analog Devices. The GT-3U-VPX from BittWare features a front panel that provides high-speed SerDes, 10/100 Ethernet and RS-232; and the extensive back panel interface supports PCI Express, Serial RapidIO, GigE and 10 GigE. The GT3X can achieve simultaneous on-board and off-board data transfers at rates exceeding 2 Gbytes/s via BittWare’s Atlantis FrameWork implemented in the Stratix II GX FPGA. The industry’s first COTS VPX (VITA 46) board based on Altera’s Stratix II GX, the GT3X provides a hybrid signal processing architecture that takes advantage of both FPGA and DSP technology creating a complete solution for applications requiring flexibility and adaptability along with high-end signal processing, all on a ruggedizable platform.

The Altera Stratix II GX FPGA is supported by Atlantis FrameWork for I/O, routing and processing. With up to 132,540 equivalent logic elements, it provides 252 embedded 18x18 multipliers, 63 DSP blocks and 6.7 Mbits of RAM. There is also IP available for: Serial RapidIO, PCI Express, GigE, 10 GigE, CPRI and OBSAI. In addition the FPGA supports 19 channels of high-speed SerDes transceivers, eight link ports at up to 600 Mbytes/s each routed from on board DSPs and 32 LVDS pairs (16 Tx and 16 Rx) to the rear panel.

The board incorporates one cluster of four ADSP-TS201S TigerSHARC DSPs that can deliver 48 GOPS 16-bit fixed point, 12 GFLOPS floating point processing power. Each DSP has four link ports with two link ports routed to the ATLANTiS FrameWork and two link ports routed for interprocessor communications. There are 24 Mbits of on-chip RAM per DSP.

The GT3X is supported by Altera’s Quartus II FPGA tools and ADI’s Crosscore tool suite for application/code development. BittWare’s BittWorks tool suite provides everything necessary for host and embedded development and consists of the Host Interface Library (HIL), which provides a C callable interface to BittWare boards from the host system (connected or remote) to read and write to memory, provide board and processor control, and control interrupts.

The BWIO Library provides a common interface for all supported components, supporting new features without API changes, and contains Atlantis/DSP/board component drivers, and POSIX-Based I/O (Open, Read, Write, Ioctl, Close). BittWare Utilities include access control to BittWare devices, a scan for BittWare devices on the network, access control from remote clients, automated host and DSP-based (if applicable) diagnostic tests and low-level debugging.


Concord, NH.

(603) 226-0404.