Device Family Integrates Dual ARM Cortex-A9 MPCore with Programmable Logic

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A new family of devices tightly integrates a complete ARM Cortex-A9 MPCore processor-based system with 28 nm, low-power programmable logic for system architects and embedded software developers to extend, customize, optimize and differentiate their systems.  The Zynq-7000 family from Xilinx is being called an Extensible Processing Platform (EPP) and was developed to achieve the levels of processing and compute performance required in high-end embedded applications targeting markets such as video surveillance, automotive driver assistance, factory automation and many others.

Each Zynq-7000 EPP device is built with an ARM dual-core Cortex-A9 MPCore processing system with NEON and Double Precision Floating Point extensions that is fully integrated and hardwired, and includes L1 and L2 caches, memory controllers, and commonly used peripherals. The processing system boots at power-up and can run a variety of operating systems independent of the programmable logic. The processing system then configures the programmable logic on an as needed basis. With this approach, the software programming model is exactly the same as standard, fully featured ARM processor-based SoCs.

Application developers can take advantage of the programmable logic’s parallel processing to handle large amounts of data across a wide range of signal processing applications, as well as extend the features of the processing system by implementing additional peripherals. High-bandwidth AMBA 4 Advanced Extensible Interface (AXI4) interconnect between the processing system and the programmable logic enables multi-gigabit data transfers at very low power, thereby eliminating common performance bottlenecks for control, data, I/O and memory.

The Zynq-7000 family accelerates time-to-market by providing an open design environment that facilitates parallel development of software for the dual-core Cortex-A9 processor-based system and custom accelerators in the programmable logic. Software developers can leverage the Eclipse environment, Xilinx Platform Studio Software Development Kit (SDK), ARM Development Studio 5 (DS-5) and ARM RealView Development Suite (RVDS), or compilers, debuggers, and applications from leading vendors within the ARM Connected Community and Xilinx Alliance Program ecosystems, such as Lauterbach, Wind River, PetaLogix, The MathWorks, Mentor Graphics, Micrium and MontaVista. 

In parallel, the Zynq-7000 family’s programmable fabric can be tailored to maximize system level performance and application specific requirements, leveraging Xilinx’s ISE Design Suite, which provides a comprehensive hardware development environment that includes development tools and AMBA4 AXI4 Plug-and-Play intellectual property (IP) and Bus Functional Models (BFM) to accelerate design and verification. Following Xilinx’s acquisition of high level synthesis leader AutoESL Design Technologies, Inc., further tool enhancements are underway to provide C, C++ and SystemC synthesis optimized for the Zynq-7000 device architecture. Future releases will also enable a more seamless movement of key algorithms between the processors and the programmable logic of the Zynq-7000 family.

The Zynq-7000 family’s programmable logic is based on Xilinx’s newest 7 series FPGA architecture to ensure 100% compatibility with respect to IP, tools and performance across all devices within the 28nm generation. The smallest Zynq-7000 devices, the Zynq-7010 and Zynq-7020 device, are based on the Artix-7 family which is optimized for low-cost and low power. The larger Zynq-7030 and Zynq-7040 devices are based on the Kintex-7 family and include between four and twelve 10.3 Gbit/s transceiver channels and a PCI Express Gen2 block for high-speed off-chip connectivity.

The Zynq-7030 and Zynq-7040 devices offer approximately 1.9 million and 3.5 million equivalent ASIC gates (125K and 235K logic cells) respectively and DSP resources that deliver 480 GMACs and 912 GMACs of peak performance. The Zynq-7010 and Zynq-7020 devices provide roughly 430,000 and 1.3 million ASIC gates  (30K and 85K logic cells) respectively, with 58 GMACs and 158 GMACs of peak DSP performance. All 4 devices also include a new dual 12bit 1Msample/s ADC block.  

Developers can begin evaluating the Zynq-7000 family now by joining the Early Access program. First silicon devices are scheduled for the second half of 2011 with engineering samples available the first half of 2011. Based on forward volume production pricing, the Zynq-7000 family will have an entry point of below $15 in high volumes. 

Xilinx, San Jose, CA. (408) 559-7778. [].