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UltraScale Multi-Processing Architecture Aims for All Programmable Multi-Processing SoCs

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Xilinx has introduced the UltraScale Multi-Processing System on Chip (MPSoC) architecture for Next Generation Zynq UltraScale MPSoCs. Building on the industry success of the Zynq-7000 All Programmable SoCs, the new UltraScale MPSoC architecture extends Xilinx’s ASIC-class UltraScale FPGA and 3D IC architecture to enable heterogeneous multi-processing with “the right engines for the right tasks.” Xilinx debuted the All Programmable SoC with the introduction of Zynq-7000, and with UltraScale MPSoC, Xilinx is inventing the first All Programmable MPSoC.

This new All Programmable MPSoC architecture provides processor scalability from 32 to 64 bits with support for virtualization, the combination of soft and hard engines for real-time control and graphics/video processing, waveform and packet processing, next generation coherent interconnect and memory, advanced power management, and technology enhancements that deliver multi-level security, safety and reliability. The UltraScale MPSoC architecture enables breakthroughs in system performance and integration at lower system power by combining heterogeneous multi-processing with extremely  fast FinFETs, leveraging TSMC’s 16nm FinFET process. 

These new architectural elements are coupled with the Vivado Design Suite and abstract design environments to greatly simplify programming and increase productivity. This includes C, C++ and OpenCL-based design abstractions, third-party system level abstractions from Mathworks and National Instruments, and IP-based design abstractions and automation. These environments enable easy software migration from the de facto standard 28nm Zynq-7000 All Programmable SoCs. The new MPSoC architecture will be supported by the expanding ecosystem of SW, Middleware, OS support, Debuggers, IP tools, boards and design services for Zynq devices.

Xilinx
San Jose, CA
(408) 559-7778
www.xilinx.com